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Correct System Design

Dr. Johannes Faber

In August 2011 Johannes Faber completed his PhD with the dissertation ``Verification Architectures for Complex Real-Time Systems''.

Since November 2011 Johannes is a Postdoctoral Research Fellow at the International Institute for Software Technology of the United Nations University.

Curriculum Vitae
Research
Theses
Projects

Curriculum Vitae

since 11/2011	Postdoctoral Research Fellow at the International Institute for Software Technology
08/2011	Defense of PhD thesis
8/2004-10/2011	Research Assistant in the Correct System Design Group (former Semantics Group)
11/2004	OLDIES award for diploma thesis 2004
7/2004	Diploma degree (with honors) in Computing Science at the University of Oldenburg
10/1999- 7/2004	Studies of Computing Science at the University of Oldenburg and the University of Freiburg

Research

My research interests are

real-time systems
compositional verification
model checking
formal methods in industrial applications
formal fault tree analysis and verification

Teaching

Diploma theses and "Individuelle Projekte" can be found on the Theses page.

Projects

AVACS (Automatic Verification and Analysis of Complex Systems)

Tools

Publications

[FLOQ11]: Johannes Faber, Sven Linker, Ernst-Rüdiger Olderog, and Jan-David Quesel. Syspect - modelling, specifying, and verifying real-time systems with rich data. International Journal of Software and Informatics, 5(1-2):117-137, 2011. ISSN 1673-7288.
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[Fab10a]: J. Faber. Verification Architectures: Compositional reasoning for real-time systems. In D. Méry and S. Merz, editors, Integrated Formal Methods, volume 6396 of Lecture Notes in Computer Science, pages 136-151. Springer, Heidelberg, 2010. This publication is available at SpringerLink.
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[Fab10b]: J. Faber. Verification Architectures: Compositional reasoning for real-time systems. Reports of SFB/TR 14 AVACS 65, SFB/TR 14 AVACS, August 2010. ISSN: 1860-9821, http://www.avacs.org.
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[FIJSS10a]: J. Faber, C. Ihlemann, S. Jacobs, and V. Sofronie-Stokkermans. Automatic verification of parametric specifications with complex topologies. In D. Méry and S. Merz, editors, Integrated Formal Methods, volume 6396 of Lecture Notes in Computer Science, pages 152-167. Springer, Heidelberg, 2010. This publication is available at SpringerLink.
[ bib | .pdf | Abstract ]
[FIJSS10b]: Johannes Faber, Carsten Ihlemann, Swen Jacobs, and Viorica Sofronie-Stokkermans. Automatic verification of parametric specifications with complex topologies. Reports of SFB/TR 14 AVACS 66, SFB/TR 14 AVACS, 2010. ISSN: 1860-9821, http://www.avacs.org.
[ bib | .pdf | Abstract ]
[Fab09]: J. Faber. Verification architectures for real-time systems. In M. Mousavi and E. Sekerinski, editors, Proceedings of Formal Methods 2009 Doctoral Symposium, number 09-15 in CS-Report, Eindhoven University of Technology, pages 14-19, 2009.
[ bib | http | .pdf ]
[MFHR08]: R. Meyer, J. Faber, J. Hoenicke, and A. Rybalchenko. Model checking duration calculus: A practical approach. Formal Aspects of Computing, 20(4-5):481-505, July 2008. ISSN 0934-5043 (Print) 1433-299X (Online).
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[FS07]: J. Faber and I. Stierand. From high-level verification to real-time scheduling: A property-preserving integration. Reports of SFB/TR 14 AVACS 19, SFB/TR 14 AVACS, June 2007. ISSN 1860-9821, http://www.avacs.org.
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[FJSS07]: J. Faber, S. Jacobs, and V. Sofronie-Stokkermans. Verifying CSP-OZ-DC specifications with complex data types and timing parameters. In J. Davies and J. Gibbons, editors, Integrated Formal Methods, volume 4591 of Lecture Notes in Computer Science, pages 233-252. Springer-Verlag, July 2007.
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[MFR06]: R. Meyer, J. Faber, and A. Rybalchenko. Model checking duration calculus: A practical approach. In K. Barkaoui, A. Cavalcanti, and A. Cerone, editors, Theoretical Aspects of Computing - ICTAC 2006, volume 4281 of LNCS, pages 332-346, 2006. This publication is available at SpringerLink.
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[FM06]: J. Faber and R. Meyer. Model checking data-dependent real-time properties of the european train control system. In Formal Methods in Computer Aided Design, 2006. FMCAD '06, pages 76-77. IEEE Computer Society Press, November 2006. This publication is available free of charge at IEEE Digital Library.
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[Fab05b]: J. Faber. Verifying real-time aspects of the European Train Control System. In Proceedings of the 17th Nordic Workshop on Programming Theory, pages 67-70. University of Copenhagen, Denmark, October 2005.
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[Fab05a]: J. Faber. Fault tree analysis with Moby/FT. Tool presentation, Department for Computing Science, University of Oldenburg, 2005.
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Theses

[Fab11]: Johannes Faber. Verification Architectures for Complex Real-Time Systems. PhD thesis, University of Oldenburg, 2011.
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[Fab04]: J. Faber. Fehlerbaumverifikation durch Modelchecking mit Uppaal. Master's thesis, Universität Oldenburg, 2004.
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